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  1. Welcome to Real Intent, Inc.

    Real Intent is developing block-to-chip level assertion-based formal verification products that dramatically improve the functional verification efficiency of ...
    formal2
    verification2
    magellan1
    EDA1
    archer1
    hdl1
    vhdl1
    verilog1
    psl1
    verifier1
    Electronic Design Automation1
    civ1
    hierarchical1
    ABV1
    systemverilog1
    blacktie1
    ovl1
    formal verification1
    Semi-formal1
    Functional verification1
    Model checking1
    property checking1
    verix1
    Functional coverage1
    0-in0
    assertion-based verification0
    Automatic assertion0
    clock intent0
    expressed intent0
    implied intent0
    Real Intent0
    static verification0

    www.realintent.com - 2009-02-06

  2. EDA DesignLine | Engineering Resource for Using EDA Tools/Techniques in Chip and System Designs

    EDA DesignLine is the engineering resource for EDA tools/techniques, electronic system level (ESL) design, synthesis, functional and physical verification, ...
    Intellectual Property2
    Analog2
    ESL2
    EDA1
    ASIC1
    PCB Design1
    VHDL1
    Power Management1
    DFM1
    Electronic Design Automation1
    Chip Design1
    Design For Manufacturing1
    Mixed-Signal1
    FPGAs1
    Functional Verification1
    PLDs1
    SoC design1
    Physical Verification1
    Electronic System Level Design1
    RTL Synthesis0

    www.edadesignline.com - 2009-02-09

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